Fin field effect transistors (finFET) are part of an emerging technology which provides solutions to field effect transistor (FET) scaling problems at, and below, the 22 nm node. FinFET structures include at a narrow semiconductor fin gated on at least two sides of the semiconductor fin. FinFET structures may be formed on a semiconductor-on-insulator (SOI) substrate, because of the low source/drain diffusion, low substrate capacitance, and ease of electrical isolation by shallow trench isolation structures.
In typical finFET fabrication process steps, the surface of a semiconductor substrate, such as a silicon wafer, is treated using various deposition and removal techniques that shape the surface to a desired structure and composition. For example, one step in forming a finFET structure may include forming a pure and contaminant free epitaxial layer on the substrate. Therefore, it may be necessary to clean the underlying surface of the substrate prior to forming the epitaxial layer. In addition to cleaning the substrate surface, known epitaxy pre-clean methods typically may have adverse effects on the substrate by, for example, removing material from the substrate that should not be removed.